1. Technical Field
The disclosure relates generally to methods of synthesizing silicon wires and, particularly, to a method of synthesizing silicon wires that employs metallic catalysts.
2. Discussion of Related Art
Since silicon is a favored material in the semiconductor industry and has been used in the IC industry for many years, much attention has already been paid to the research and synthesis of silicon wires. In 1964, micrometer-scaled silicon whiskers grown on silicon substrates were synthesized by a Vapor-liquid-solid (VLS) method. Nowadays, the VLS method is an important way to synthesize silicon wires. In this method, metals, generally selected from gold (Au), nickel (Ni), and iron (Fe), are employed as catalysts.
Although Au is a common catalyst for silicon wires by the VLS method, the use thereof is limited by its expense. Furthermore, in the VLS method employing Au as a catalyst, poisonous, and/or noxious matter is prone to be formed in the process, thereby forming pollutants that must be collected, thus, increasing the environmental control costs associated therewith. The introduction of cheaper metals, such as Fe and Ni, to catalyze the silicon wires has proven to be difficult for at least two reasons. One reason is a high synthesizing temperature (i.e., above 1000° C.) is needed, thereby increasing the cost of the fabrication. Another reason is the catalysts of Fe or Ni are prone to render unwanted impurities within semiconductor elements, thereby decreasing the performance thereof.
What is needed, therefore, is a method of synthesizing silicon wires that overcomes the above-mentioned shortcomings.
The exemplifications set out herein illustrate at least one embodiment of the present method, in one form, and such exemplifications are not to be construed as limiting the scope of such a method in any manner.